Conference paper
2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2020, pp. 107--114
APA
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Meng, Y., Kuppannagari, S., Rajat, R., Srivastava, A., Kannan, R., & Prasanna, V. (2020). QTAccel: A generic FPGA based design for Q-table based reinforcement learning accelerators. In 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) (pp. 107–114). IEEE.
Chicago/Turabian
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Meng, Yuan, Sanmukh Kuppannagari, Rachit Rajat, Ajitesh Srivastava, Rajgopal Kannan, and Viktor Prasanna. “QTAccel: A Generic FPGA Based Design for Q-Table Based Reinforcement Learning Accelerators.” In 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 107–114. IEEE, 2020.
MLA
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Meng, Yuan, et al. “QTAccel: A Generic FPGA Based Design for Q-Table Based Reinforcement Learning Accelerators.” 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2020, pp. 107–14.
BibTeX Click to copy
@inproceedings{meng2020a,
title = {QTAccel: A generic FPGA based design for Q-table based reinforcement learning accelerators},
year = {2020},
organization = {IEEE},
pages = {107--114},
author = {Meng, Yuan and Kuppannagari, Sanmukh and Rajat, Rachit and Srivastava, Ajitesh and Kannan, Rajgopal and Prasanna, Viktor},
booktitle = {2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)}
}