Conference paper
2020 IEEE High performance extreme computing conference (HPEC), IEEE, 2020, pp. 1--7
APA
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Zhang, R., Wijeratne, S., Yang, Y., Kuppannagari, S. R., & Prasanna, V. K. (2020). A high throughput parallel hash table on fpga using xor-based memory. In 2020 IEEE High performance extreme computing conference (HPEC) (pp. 1–7). IEEE.
Chicago/Turabian
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Zhang, Ruizhi, Sasindu Wijeratne, Yang Yang, Sanmukh R Kuppannagari, and Viktor K Prasanna. “A High Throughput Parallel Hash Table on Fpga Using Xor-Based Memory.” In 2020 IEEE High Performance Extreme Computing Conference (HPEC), 1–7. IEEE, 2020.
MLA
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Zhang, Ruizhi, et al. “A High Throughput Parallel Hash Table on Fpga Using Xor-Based Memory.” 2020 IEEE High Performance Extreme Computing Conference (HPEC), IEEE, 2020, pp. 1–7.
BibTeX Click to copy
@inproceedings{zhang2020a,
title = {A high throughput parallel hash table on fpga using xor-based memory},
year = {2020},
organization = {IEEE},
pages = {1--7},
author = {Zhang, Ruizhi and Wijeratne, Sasindu and Yang, Yang and Kuppannagari, Sanmukh R and Prasanna, Viktor K},
booktitle = {2020 IEEE High performance extreme computing conference (HPEC)}
}