Sanmukh Kuppannagari

James C. Wyant Assistant Professor

How to avoid zero-spacing in fractionally-strided convolution? a hardware-algorithm co-design methodology


Conference paper


Yuan Meng, Sanmukh Kuppannagari, Rajgopal Kannan, Viktor Prasanna
2021 IEEE 28th International Conference on High Performance Computing, Data, and Analytics (HiPC), IEEE, 2021, pp. 81--90

Cite

Cite

APA   Click to copy
Meng, Y., Kuppannagari, S., Kannan, R., & Prasanna, V. (2021). How to avoid zero-spacing in fractionally-strided convolution? a hardware-algorithm co-design methodology. In 2021 IEEE 28th International Conference on High Performance Computing, Data, and Analytics (HiPC) (pp. 81–90). IEEE.


Chicago/Turabian   Click to copy
Meng, Yuan, Sanmukh Kuppannagari, Rajgopal Kannan, and Viktor Prasanna. “How to Avoid Zero-Spacing in Fractionally-Strided Convolution? a Hardware-Algorithm Co-Design Methodology.” In 2021 IEEE 28th International Conference on High Performance Computing, Data, and Analytics (HiPC), 81–90. IEEE, 2021.


MLA   Click to copy
Meng, Yuan, et al. “How to Avoid Zero-Spacing in Fractionally-Strided Convolution? a Hardware-Algorithm Co-Design Methodology.” 2021 IEEE 28th International Conference on High Performance Computing, Data, and Analytics (HiPC), IEEE, 2021, pp. 81–90.


BibTeX   Click to copy

@inproceedings{meng2021a,
  title = {How to avoid zero-spacing in fractionally-strided convolution? a hardware-algorithm co-design methodology},
  year = {2021},
  organization = {IEEE},
  pages = {81--90},
  author = {Meng, Yuan and Kuppannagari, Sanmukh and Kannan, Rajgopal and Prasanna, Viktor},
  booktitle = {2021 IEEE 28th International Conference on High Performance Computing, Data, and Analytics (HiPC)}
}


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